make: *** No rule to make target ` ', needed by `src/seui/backend/backend.o'. Stop.
为什么会产生一个空格依赖(经 xxd 确认,`' 里的确实是空格)?
这种错误往往是因为什么产生的?
能否通过手写规则来 reproduce 这样的错误?
……
我的 makefile,求 debug……
# configurations
CC = g++
LD = g++
SUFFIX = cc
SRC = $(shell find . -name '*.$(SUFFIX)'|sed 's/^\.\///g')
OBJ = $(SRC:.$(SUFFIX)=.o)
DST = seui
APP = $(DST)
VER = 0.10
ARG =
FLG = -Wall -O3 -std=gnu++0x -I. -I./src/seui `pkg-config --cflags glfw3 gl glu`
LIB = `pkg-config --libs glfw3 gl glu`
# interfaces
.PHONY: all clean cleanall rebuild package test commit install uninstall
all: config.h $(DST)
clean:
rm -f config.h $(OBJ)
cleanall: clean
rm -f $(DST) *.tar.gz
rebuild: cleanall all
package:
mkdir -p $(APP)-$(VER)
mv makefile COPYING README.md $(SRC) $(APP)-$(VER)
tar cvfz $(APP)-$(VER).tar.gz $(APP)-$(VER)
mv $(APP)-$(VER)/* .
rm -rf $(APP)-$(VER)
test: all
./$(DST) $(ARG)
commit: cleanall
git add -A .
git diff --cached
git commit -a || true
install: all
install -svm 755 ./$(DST) /usr/bin/$(DST)
uninstall: all
rm -f /usr/bin/$(DST)
# rules
config.h: makefile
echo "#pragma once" > config.h
echo "#define APP_NAME \"$(APP)\"" >> config.h
echo "#define APP_VER \"$(VER)\"" >> config.h
$(DST): $(OBJ)
$(LD) -o $@ $^ $(FLG) $(LIB)
.$(SUFFIX).o:
$(CC) -c -o $@ $< $(FLG) $(LIB)
$(foreach file,$(SRC), \
$(eval $(shell dirname $(file))/$(shell $(CC) -MM $(FLG) $(file))) \
)
最近编辑记录 cjxgm (2013-10-12 18:54:03)
Giumo Clanjor (哆啦比猫/兰威举)
Where there is a hacker, there is art. | Dogfooding myself. (C++ / Lua / Perl / Rust)
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